About the Company:

This is a quantitative trading and investment firm with a disciplined and systematic quantitative approach to identify factors that consistently generate alpha. These factors are then coupled with our proprietary ultra-low latency trading systems and robust risk management to develop trading strategies across asset classes (equities, commodities, currencies, fixed income) that trade on global exchanges.

They are looking for a ’full stack’ FPGA developer with at least 3 years of industry experience in hardware development to help build out hardware platform for low latency trading.

Responsibilities:
*Design, implementation, test, integration and delivery of low latency trading systems.
*Development of low latency designs in Verilog/System Verilog
*Development of test harnesses to verify developed items using self-checking test benches, BFMs, etc.
*Integration of the developed firmware on the target hardware with other system components and software
*Release of developed items
*Contribute to peer design reviews
*Undertake requirements capture
*Work in fast moving, short feedback development environment
*Ensure that all business activity is conducted in line with company values, policies and ethics codes of conduct
*Undertake any other activity as reasonably requested by management

Qualifications & Skills:
*Degree qualified in electronics/engineering related subject; however, experience will be considered in lieu of formal academic qualifications
*3 years of industry experience
*Excellent design standards and strong debug skills
*Hands on Digital Design and FPGA Architecture experience is required
*Strong problem-solving and analytical skills
*An appreciation of digital hardware design
*Experience of developing self-checking testbenches, BFMs
*An appreciation of other engineering disciplines; Software, Networking
*Familiarity with digital communications protocols and general networking experience
*Experience of developing on large Altera and Xilinx FPGAs
*Experience in writing RTL in Verilog/System Verilog or VHDL
*Working knowledge of the following engineering tools - Vivado and Questasim
*Experience of working in a linux-based development environment
*Scripting; tcl/tk, python

Why You Should Join:
*Great People. Curious engineers, mathematicians, statisticians who like to have fun while achieving their goals
*Transparent Structure. Employees know their ideas and contributions are valued
*Relaxed Environment. A flat organizational structure with frequent activities for all employees, such as yearly offsites, happy hours, corporate sports teams, etc.
*Health & Wellness Programs. Believing that a balanced employee is more productive, a stocked kitchen, gym membership and generous vacation packages are just some of the perks offered


Whilst we carefully review all applications, to all jobs, due to the high volume of applications we receive it is not possible to respond to those who have not been successful.

Contact
If this sounds like you, or you’d like more information, please contact:

George Hutchinson-Binks

(+44)
in/george-hutchinson-binks-a62a69252